Automatic Generation of Resource and Accuracy Configurable Processing Elements

نویسندگان

چکیده

Low-power consumption and scarce computational resources limit the computation at edge. Besides, approximate computing paradigm reports promising techniques for designing accelerators to deal with inherent limitations of edge, high-level synthesis C++ opens opportunity use meta-programming specialisable generic design. This work proposes a framework automatically generating synthesis-time configurable processing elements (PEs) matrix multiplication-addition (GEMMA) convolution. To evaluate our work, we perform design exploration after varying data bit-width, operand sizes, kernel sizes. Our analyses include resource scaling, clocks-to-solution, efficiency, error distribution, presenting comprehensive view how parameters affect properties implementations. The GEMMA presented trade-off between granularity vs efficiency , where large PEs short widths are favoured by achieving, theoretically, up 75 GMAC/s on Xilinx XC7Z020 @ 100 MHz an 27%. For propose figure merit operations per second utilisation respect maximum achievable FPGA. Regarding convolution PEs, implemented two algorithms: window-based spatial Winograd. former is best in terms performance 150 GMAC/s, reaching 47% efficiency. Winograd also outperformed numerically using 3× 3 filter, mean 11.01% 4-bits operands PSNR=16.28 dB, compared 38.2% PSNR=5.89 dB. Finally, discuss mostly dependent PE’s parameters. In GEMMA, depends size, causing PE scaling but still applicable accelerators. developed during this research will lead further granular accelerator research.

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ژورنال

عنوان ژورنال: ACM Transactions in Embedded Computing Systems

سال: 2023

ISSN: ['1539-9087', '1558-3465']

DOI: https://doi.org/10.1145/3594540